SH7785 Datasheet, PDF (1059/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

20. Graphics Data Translation Accelerator (GDTA)
20.5 Interrupt Processing
In the GDTA, there are four types of interrupt sources. There are three interrupt flags for CL
processing end, MC processing end, and CL/MC errors, used to identify interrupt sources. The
interrupt enable bit allows generation of interrupt requests.
CL errors and MC errors use a common GAERI interrupt.
Table 20.10 GDTA Interrupt Request
Interrupt Source
CL_END interrupt
MC_END interrupt
CL_ERR interrupt
MC_ERR interrupt
Interrupt Flag
CL_END
MC_END
CL_ERR or MC_ERR
Enable Bit
CL_ENEN
MC_ENEN
CL_EREN
MC_EREN
Description
CL processing ended
MC processing ended
CL error occurred
MC error occurred
20.6 Data Alignment
The GDTA performs data alignment conversion of input data, output data, and RAM 0/1 data
using an endian signal (pin MD8) or using GDTA internal registers.
Table 20.11 shows the correspondence between data alignment conversion patterns and the
settings of DRCL_CTL, DWCL_CTL, DRMC_CTL, DWMC_CTL, DCP_CTL, and DID_CTL.
Table 20.11 GDTA Data Alignment Conversion
DTAM DTSA DTUA Little (MD8) Data Alignment Conversion Pattern Remarks
0
H'00
H'00
0
CP3 (2)
0
H'00
H'00
1
CP3 (1)
1
H'00
H'00
*
CP3 (2)
1
H'01
H'01
*
CP1 (1)
1
H'01
H'10
*
CP2 (1)
1
H'01
H'11
*
CP3 (1)
1
H'10
H'01
*
CP1 (2)
1
H'10
H'10
*
CP2 (2)
1
H'11
H'01
*
CP1 (3)
Note: * For the data alignment pattern numbers, refer to figure 20.8.
Rev.1.00 Jan. 10, 2008 Page 1029 of 1658
REJ09B0261-0100