SH7785 Datasheet, PDF (1095/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

21. Serial Communication Interface with FIFO (SCIF)
21.3.11 Receive FIFO Data Count Register n (SCRFDR)
SCRFDR is a 16-bit register that indicates the number of receive data bytes stored in SCFRDR.
SCRFDR can always be read from the CPU.
BIt: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ R6 R5 R4 R3 R2 R1 R0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Bit
15 to 7
Bit Name
—
Initial
Value
All 0
6 to 0 R6 to R0 All 0
R/W Description
R
Reserved
These bits are always read as 0. The write value
should always be 0.
R
These bits show the number of receive data bytes in
SCFRDR. A value of H'00 indicates that there is no
receive data, and a value of H'40 indicates that
SCFRDR is full of receive data.
Rev.1.00 Jan. 10, 2008 Page 1065 of 1658
REJ09B0261-0100