SH7785 Datasheet, PDF (1237/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

24. Multimedia Card Interface (MMCIF)
1 word (2 bytes)
H'01
H'23
64 words
H'45
H'89
.
.
.
H'67
H'AB
.
.
.
FIFO
Figure 24.2 DR Access Example
24.3.17 FIFO Pointer Clear Register (FIFOCLR)
The FIFO write/read pointer is cleared by writing an arbitrary value to FIFOCLR.
Bit: 7
6
5
4
3
2
1
0
FIFOCLR
Initial value: 0
0
0
0
0
0
0
0
R/W: W W W W W W W W
Bit
7 to 0
Bit Name
FIFOCLR
Initial
Value R/W
H'00 W
Description
The FIFO pointer is cleared by writing an arbitrary value
to this register.
Rev.1.00 Jan. 10, 2008 Page 1207 of 1658
REJ09B0261-0100