SH7785 Datasheet, PDF (345/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Interrupt Controller (INTC)
(2) INT2B1: Detailed Interrupt Sources for the SCIF
Module Bit
Name
SCIF
31 to 24 ⎯
23
TXI5
22
BRI5
21
RXI5
20
ERI5
19
TXI4
18
BRI4
17
RXI4
16
ERI4
15
TXI3
14
BRI3
13
RXI3
12
ERI3
Detailed Source
Reserved
These bits are read as 0
and cannot be modified.
SCIF channel 5 transmit
FIFO data empty interrupt
SCIF channel 5 break
interrupt or overrun error
interrupt
SCIF channel 5 receive
FIFO data full interrupt or
receive data ready
interrupt
SCIF channel 5 receive
error interrupt
SCIF channel 4 transmit
FIFO data empty interrupt
SCIF channel 4 break
interrupt or overrun error
interrupt
SCIF channel 4 receive
FIFO data full interrupt or
receive data ready
interrupt
SCIF channel 4 receive
error interrupt
SCIF channel 3 transmit
FIFO data empty interrupt
SCIF channel 3 break
interrupt or overrun error
interrupt
SCIF channel 3 receive
FIFO data full interrupt or
receive data ready
interrupt
SCIF channel 3 receive
error interrupt
Description
SCIF interrupt sources are
indicated. This register indicates
the SCIF interrupt sources even if
the mask setting for SCIF is made
in the interrupt mask register.
Rev.1.00 Jan. 10, 2008 Page 315 of 1658
REJ09B0261-0100