SH7785 Datasheet, PDF (426/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Local Bus State Controller (LBSC)
Table 11.14 16-Bit External Device/Little-Endian Access and Data Alignment
Operation
Data Bus
Strobe Signals
Access
Size
D31 to D23 to D15 to D7 to
Address No. D24
D16
D8
D0
WE3
WE2
WE1
WE0
Byte
2n
1⎯
⎯
⎯
Data
7 to 0
Asserted
2n + 1 1 ⎯
⎯
Data ⎯
7 to 0
Asserted
Word
2n
1⎯
⎯
Data Data
15 to 8 7 to 0
Asserted Asserted
Longword 4n
1⎯
⎯
Data Data
15 to 8 7 to 0
Asserted Asserted
4n + 2 2 ⎯
⎯
Data Data
31 to 24 23 to 16
Asserted Asserted
32 Bytes* 8n
1⎯
⎯
Data 15 Data 7
to 8
to 0
Asserted Asserted
8n + 2 2 ⎯
⎯
Data 31 Data 23
to 24 to 16
Asserted Asserted
8n + 4 3 ⎯
⎯
Data 47 Data 39
to 40 to 32
Asserted Asserted
…
……
…
…
…
…
…
…
…
8n + 30 16 ⎯
⎯
Data Data
255 to 247 to
248
240
Asserted Asserted
Note: * This table shows an example when the access start address is on the 32-byte
boundary. When the start address is not on the 32-byte boundary, accesses are
performed up to immediately before the 32-byte boundary and the address is wrapped
around to the previous 32-byte boundary.
Rev.1.00 Jan. 10, 2008 Page 396 of 1658
REJ09B0261-0100