SH7785 Datasheet, PDF (798/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

16. Watchdog Timer and Reset (WDT)
16.3.5 Watchdog Timer Base Counter (WDTBCNT)
WDTBCNT is a 32-bit read-only register comprising an 18-bit counter that is incremented by the
peripheral clock (Pck). When WDTBCNT overflows, WDTCNT is incremented and WDTBCNT
is cleared to H'0000 0000.
WDTBCNT is only reset by a power-on reset. Writing to this register is invalid.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ WDTBCNT
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
WDTBCNT
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Initial
Bit
Bit Name Value R/W
31 to 18 ⎯
All 0 R
17 to 0 WDTBCNT All 0 R
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Base counter value
Rev.1.00 Jan. 10, 2008 Page 768 of 1658
REJ09B0261-0100