SH7785 Datasheet, PDF (1563/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

31. Register List
31.2 States of the Registers in the Individual Operating Modes
The states of the I/O registers incorporated in the SH7785 in the individual operating modes are
listed in tables 31.2 to table 31.9. The registers are described in order of section number in this
manual, and are grouped by functional module. Since this is a summary, parts of the descriptions,
along with the notes, have been omitted. For details on the registers, refer to the descriptions in the
corresponding sections.
Table 31.2 States of the Registers in the Individual Operating Modes (1)
Module
Name
Name
Abbrev.
Exception TRAPA exception register
processing _{Exception event register}
TRA
EXPEVT
Interrupt event register
INTEVT
Non-support detection exception register
EXPMASK
MMU
Page table entry high register
PTEH
Page table entry low register
PTEL
Translation table base register
TTB
TLB exception address register
TEA
MMU control register
MMUCR
Physical address space control register
PASCR
Instruction re-fetch inhibit control register
IRMCR
Page table entry assistance register
PTEA
Cache
Cache control register
CCR
Queue address control register 0
QACR0
Queue address control register 1
QACR1
On-chip memory control register
RAMCR
L memory L memory transfer source address register 0 LSA0
L memory transfer source address register 1 LSA1
L memory transfer destination address
register 0
LDA0
L memory transfer destination address
register 1
LDA1
Power-on
Reset by
PRESET Pin/
WDT/H-UDI
Manual Reset
by
WDT/Multiple
Exception
Sleep/
Deep Sleep by
SLEEP
Instruction
Undefined
Undefined
Retained
H'0000 0000 H'0000 0020 Retained
Undefined
Undefined
Retained
H'0000 0013 H'0000 0013 Retained
Undefined
Undefined
Retained
Undefined
Undefined
Retained
Undefined
Undefined
Retained
Undefined
Retained
Retained
H'0000 0000 H'0000 0000 Retained
H'0000 0000 H'0000 0000 Retained
H'0000 0000 H'0000 0000 Retained
Undefined
Undefined
Retained
H'0000 0000 H'0000 0000 Retained
Undefined
Undefined
Retained
Undefined
Undefined
Retained
H'0000 0000 H'0000 0000 Retained
Undefined
Undefined
Retained
Undefined
Undefined
Retained
Undefined
Undefined
Retained
Undefined
Undefined
Retained
Rev.1.00 Jan. 10, 2008 Page 1533 of 1658
REJ09B0261-0100