SH7785 Datasheet, PDF (398/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Local Bus State Controller (LBSC)
Initial
Bit
Bit Name Value R/W
26
DPUP
0
R/W
25
⎯
0
R
24
OPUP
0
R/W
23 to 20 DACKBST All 0 R/W
[3:0]
Description
Data Pin Pull-Up Resistor Control
Specifies the pull-up resistor state of the data pins (D63
to D0). This bit is initialized at a power-on reset. The
pins are not pulled up when access is performed or
when the bus is released, even if the pull-up resistor is
on.
0: Some cycles of the pull-up resistors of the data pins
(D63 to D0) are turned on before and after a
memory access.*
1: Pull-up resistors of the data pins (D63 to D0) are off.
Note: * When data pin pull-up is necessary, it is
recommended to connect a pull-up resistor
externally.
Reserved
This bit is always read as 0. The write value should
always be 0.
Control Output Pin Pull-Up Resistor Control
Specifies the pull-up resistor state (A25 to A0, BS, CSn,
RD, WE, R/W, CE2A, and CE2B) when the control
output pins are high-impedance. This bit is initialized at
a power-on reset.
0: Pull-up resistors for control output pins (A25 to A0,
BS, CSn, RD, WE, R/W, CE2A, and CE2B) are on
1: Pull-up resistors for control output pins (A25 to A0,
BS, CSn, RD, WE, R/W, CE2A, and CE2B) are off
DACKBST3 to DACKBST0
0: DACKn signals asserted in synchronization with the
bus cycle (n = 0 to 3)
1: DACKn signals remain asserted from the start to the
end of burst transfer when DMA transfer is performed
in burst mode
These bits can be set to 1 only when the memory type
of the DACK output area in the corresponding DMA
transfer channel is set to PCMCIA interface. In other
cases, these bits should be cleared to 0.
The pins corresponding to each bits are as follows.
DACKBST[3]: DACK3
DACKBST[2]: DACK2
DACKBST[1]: DACK1
DACKBST[0]: DACK0
Rev.1.00 Jan. 10, 2008 Page 368 of 1658
REJ09B0261-0100