SH7785 Datasheet, PDF (944/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

19. Display Unit (DU)
19.3.47 Plane n Memory Length Register (PnMLR) (n = 1 to 6)
The plane n memory length registers (PnMLR, n = 1 to 6) set the memory length (Y-direction
memory area) for plane n.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
— — — — — — — — — — — — — — — PnMLY
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R/W
Internal update:
O
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PnMLY
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Internal update: O O O O O O O O O O O O O O O O
Initial
Bit
Bit Name Value
31 to 17 ⎯
All 0
16 to 0 PnMLY 0
Internal
R/W Update Description
R
⎯
Reserved
These bits are always read as 0. The write value
should always be 0.
R/W Yes
Plane n Memory Length Y
The memory length (Y-direction memory area)
for plane n should be set in raster line units.
When the display exceeds this area, the display
data becomes the data for BPOR.
When the setting is 0, the area is handled as an
infinite area, and so the display data is never the
background color register data.
Rev.1.00 Jan. 10, 2008 Page 914 of 1658
REJ09B0261-0100