SH7785 Datasheet, PDF (674/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

13. PCI Controller (PCIC)
(6) Endian
This LSI supports both the big and little endian formats. Since the PCI local bus is inherently little
endian, the PCIC supports both byte swapping and non-byte swapping.
The endian format is specified by the TBS bit in PCICR.
1. Little endian
PCI bus data
31
0
A B CD
PCI_Addr[2] = 1
PCI_Addr[2] = 0
Buffer data
A' B' C' D' A B C D
MSB
LSB
SHwy data
A' B' C' D' A B C D
2. Big endian
PCI bus data
31
0
A B CD
PCI_Addr[2] = 0
PCI_Addr[2] = 1
Buffer data
A B C D A' B' C' D'
MSB
LSB
SHwy data
A B C D A' B' C' D'
Note: PCIAddr[2]: PCI bus AD[2]
Figure 13.13 Endian Conversion from PCI Bus to SuperHyway Bus
(Non-Byte Swapping: TBS = 0)
Rev.1.00 Jan. 10, 2008 Page 644 of 1658
REJ09B0261-0100