SH7785 Datasheet, PDF (585/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

13. PCI Controller (PCIC)
Signal Name
LOCK/ODDF
IDSEL
DEVSEL/
DCLKOUT
SCIF0_CTS/
INTD
DREQ3/INTC
DREQ2/INTB
INTA
REQ3
REQ2 to REQ1
GNT3
GNT2 to GNT1
REQ0/REQOUT
GNT0/GNTIN
SERR
PERR
PCIRESET
PCI Standard
Signal
I/O
Description
LOCK
STRI PCI Lock
Exclusive access (the target resource is locked) is
accepted when the PCIC is a target
IDSEL
IN PCI Configuration Device Select
This signal is input to select the PCIC in configuration
cycles (only in normal mode).
DEVSEL
STRI PCI Device Select
Indicates the PCIC has decoded the address of the PCI
device as the target. When this signal is an input signal,
it indicates that the PCIC has been selected.
INTD
IN Interrupt D
Indicates that a PCI device is requesting PCI interrupts.
Only in host mode.
INTC
IN Interrupt C
Indicates that a PCI device is requesting PCI interrupts.
Only in host mode.
INTB
IN Interrupt B
Indicates that a PCI device is requesting PCI interrupts.
Only in host mode.
INTA
O/D Interrupt A
Indicates that a PCI device is requesting PCI interrupts
in host mode. This signal is output so that the PCIC can
request interrupts in normal mode.
REQ3
IN PCI Bus Request (only in host mode)
REQ[2:1]
IN PCI Bus Request (only in host mode)
GNT3
TRI PCI Bus Grant (only in host mode)
GNT[2:1]
TRI PCI Bus Grant (only in host mode)
REQ0
TRI PCI Bus Request (input/output in host mode, and
output in normal mode)
GNT0
TRI PCI Bus Grant (output/input in host mode, and input in
normal mode)
SERR
O/D PCI System Error
PERR
TRI PCI Parity Error
—
OUT PCI Reset Output
Rev.1.00 Jan. 10, 2008 Page 555 of 1658
REJ09B0261-0100