SH7785 Datasheet, PDF (1128/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

21. Serial Communication Interface with FIFO (SCIF)
Thus, the reception margin in asynchronous mode is given by formula (1).
1
| D - 0.5 |
M= (0.5 -
) - (L - 0.5) F -
(1 + F) × 100 % .................. (1)
2N
N
M: Receive margin (%)
N: Ratio of bit rate to clock (N = 16)
D: Clock duty (D = 0 to 1.0)
L: Frame length (L = 9 to 12)
F: Absolute value of clock rate deviation
From equation (1), if F = 0 and D = 0.5, the reception margin is 46.875%, as given by formula (2).
When D = 0.5 and F = 0:
M = (0.5 – 1 / (2 × 16) ) × 100% = 46.875% ............................................... (2)
However, this is a theoretical value. A reasonable margin to allow in system designs is 20% to
30%.
Rev.1.00 Jan. 10, 2008 Page 1098 of 1658
REJ09B0261-0100