SH7785 Datasheet, PDF (396/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Local Bus State Controller (LBSC)
Example:
-----------------------------------------------------------------------
MOV.L #H'FC400020, R0
;
MOV.L #MMSELR_DATA, R1
; MMSELR_DATA=Writing value of MMSELR
SYNCO
;
(upper word=H'A5A5)
MOV.L R1, @R0
; Writing to MMSELR
MOV.L @R0, R2
MOV.L @R0, R2
SYNCO
-----------------------------------------------------------------------
The instruction to write to this register should be allocated to the uncacheable area P2 and to the
area that is not affected by writing to this register.
This register should be written before enabling the instruction cache, operand cache, and MMU
address translation and should not be rewritten until after a power-on reset or manual reset is
executed.
Rev.1.00 Jan. 10, 2008 Page 366 of 1658
REJ09B0261-0100