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SH7785 Datasheet, PDF (1055/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer
20. Graphics Data Translation Accelerator (GDTA)
No. Operation Description
(4) Calculation of The following formulae are used to compute input positions (nth row and
input position below) (DDR2-SDRAM input address).
(nth row and Input address formulae for nth row and below
below)
• Y input comparison address
Calculation formula: Past frame Y point value (base point) + [(mbrow × 16
+ (Recon_down>>1) + n - 1) × (width + Y padding)] + [mbcol × 16 +
(Recon_right>>1)]
Past frame Y pointer value (base point): MCPYPR setting address
mbrow: Calculated from MCCF setting
mbcol: Calculated from MCCF setting
Recon_down: Calculated from MCCF setting
Recon_right: Calculated from MCCF setting
width: Calculated from MCWR setting
Y padding: Calculated from MCYPR setting
Depending on the motion vector value, 16-dot data (16 bytes) or 17-dot data
(17 bytes) is processed in succession.
Future frame Y pointer address is calculated using a formula similar to that for
the past frame.
• U/V input comparison address
Calculation formula: Past frame U point value (base point) + [(mbrow × 8 +
(Recon_down/2>>1) + n - 1) × (width/2 + U padding)] + [mbcol × 8 +
((Recon_right/2)>>1)]
Past frame U pointer value (base point): MCPUPR setting address
mbrow: Calculated from MCCF setting
mbcol: Calculated from MCCF setting
Recon_down: Calculated from MCCF setting
Recon_right: Calculated from MCCF setting
width: Calculated from MCWR setting
U padding: Calculated from MCUVPR setting
Depending on the motion vector value, 8-dot data (8 bytes) or 9-dot data (9
bytes) is processed in succession.
Future frame U pointer address is calculated using a formula similar to that for
the past frame.
V pointer address is calculated using a formula similar to that for the U pointer
address.
(5) Data reading Input data stored in DDR2-SDRAM is read into the GDTA at the address
computed in (3) and (4).
Rev.1.00 Jan. 10, 2008 Page 1025 of 1658
REJ09B0261-0100