SH7785 Datasheet, PDF (516/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

12. DDR2-SDRAM Interface (DBSC2)
12.4.4 SDRAM Configuration Setting Register (DBCONF)
The SDRAM configuration setting register (DBCONF) is a readable/writable register. It is
initialized only upon power-on reset.
BIt: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ SPILT7 SPILT6 SPILT5 SPILT4 SPILT3 SPILT2 SPILT1 SPILT0
Initial value: 0
0
0
0
0
0
0
0
1
0
0
1
1
0
1
0
R/W: R R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W
BIt: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
⎯
⎯
⎯
⎯
⎯
⎯ BASFT1 BASFT0 ⎯
⎯
⎯
⎯
⎯
⎯
BWID BWID
TH1 TH0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
R/W: R R R R R R R/W R/W R R R R R R R/W R/W
Bit
Bit Name
31 to 24 ⎯
23 to 16 SPLIT7 to
SPLIT0
Initial
Value
R/W
All 0
R
1001 1010 R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Operation when a value other than 0 is written is not
guaranteed.
Memory Configuration Select Bits
These bits select the memory configuration to be used.
These are used in combination with the BASFT and the
BWIDTH bits. For details on address multiplexing, refer
to section 12.5.6, Regarding Address Multiplexing.
1001 1010: 256-Mbit product (16M × 16 bits)
1001 1011: 512-Mbit product (32M × 16 bits)
1101 1011: 1-Gbit product (64M × 16 bits)
1110 0011: 2-Gbit product (128M × 16 bits)
0001 1011: 256-Mbit product (32M × 8 bits)
0010 0011: 512-Mbit product (64M × 8 bits)
0110 0011: 1-Gbit product (128M × 8 bits)
0110 1011: 2-Gbit product (256M × 8 bits)
Other than above: Setting prohibited (If specified,
correct operation cannot be
guaranteed.)
Rev.1.00 Jan. 10, 2008 Page 486 of 1658
REJ09B0261-0100