SH7785 Datasheet, PDF (659/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

13. PCI Controller (PCIC)
(28) PCI PIO Data Register (PCIPDR)
By reading or writing to this register, a configuration cycle is generated on the PCI bus. For
details, see section 13.4.5 (2), Configuration Space Access.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
PDR
Initial value: x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
SH R/W: _{R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W}
PCI R/W: — — — — — — — — — — — — — — — —
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PDR
Initial value: x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
SH R/W: _{R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W}
PCI R/W: — — — — — — — — — — — — — — — —
Bit
31 to 0
Initial
Bit Name Value
PDR
H'xxxx
xxxx
R/W Description
SH: R/W PCI PIO Data Register
PCI: ⎯ By reading or writing to this register, a configuration
cycle is generated on the PCI bus.
Rev.1.00 Jan. 10, 2008 Page 629 of 1658
REJ09B0261-0100