SH7785 Datasheet, PDF (1146/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22. Serial I/O with FIFO (SIOF)
Initial
Bit
Bit Name Value R/W Description
3
TFOVF
0
R/W Transmit FIFO Overflow
0: Indicates that no transmit FIFO overflow occurs
1: Indicates that a transmit FIFO overflow occurs
A transmit FIFO overflow means that there has been an
attempt to write to SITDR when the transmit FIFO is full.
When a transmit FIFO overflow occurs, the SIOF
indicates overflow, and writing is invalid.
• This bit is valid when the TXE bit in SICTR is 1.
• When 1 is written to this bit, the contents are
cleared. Writing 0 to this bit is invalid.
• To enable the issuance of this interrupt source, set
the TFOVFE bit in SIIER to 1.
2
TFUDF
0
R/W Transmit FIFO Underflow
0: Indicates that no transmit FIFO underflow occurs
1: Indicates that a transmit FIFO underflow occurs
A transmit FIFO underflow means that loading for
transmission has occurred when the transmit FIFO is
empty.
When a transmit FIFO underflow occurs, the SIOF
repeatedly sends the previous transmit data.
• This bit is valid when the TXE bit in SICTR is 1.
• When 1 is written to this bit, the contents are
cleared. Writing 0 to this bit is invalid.
• To enable the issuance of this interrupt source, set
the TFUDFE bit to 1.
Rev.1.00 Jan. 10, 2008 Page 1116 of 1658
REJ09B0261-0100