SH7785 Datasheet, PDF (1009/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

20. Graphics Data Translation Accelerator (GDTA)
20.3.1 GA Mask Register (GACMR)
GACMR is in the GDTA common register block and enables writing to the GA enable register
(GACER). Writing to GACER is enabled by writing of the key code to this register. In the initial
state, the key code is not written and writing to GACER is disabled.
BIt: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
GACM
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
BIt: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
GACM
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit Name
31 to 0 GACM
Initial
Value
0
R/W Description
R/W Write the key code [H'A55A 0FF0] to enable writing to
GACER. If a value other than the key code is written,
writing to the GA enable register is disabled.
Rev.1.00 Jan. 10, 2008 Page 979 of 1658
REJ09B0261-0100