SH7785 Datasheet, PDF (1572/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

31. Register List
Table 31.4 States of the Registers in the Individual Operating Modes (3)
Module
Name
Name
Abbrev.
Power-on
Reset by
PRESET Pin/
WDT
Power-on
Reset by
H-UDI
Manual Reset Sleep/
by
Deep Sleep
WDT/Multiple by SLEEP
Exception Instruction
CPG/
Power-
down
Frequency control register 0
Frequency control register 1
Frequency display register 1
FRQCR0
FRQCR1
FRQMR1
H'0000 0000 Retained
H'0000 0000 Retained
H'1xxx xxxx*¹ Retained
Retained
Retained
Retained
Retained
Retained
Retained
Sleep control register
SLPCR
H'0000 0000 Retained
Retained
Retained
PLL control register
PLLCR
H'0000 0000 Retained
Retained
Retained
Standby control register 0
MSTPCR0 H'0000 0000 Retained
Retained
Retained
Standby control register 1
MSTPCR1 H'0000 0000 Retained
Retained
Retained
Standby display register
MSTPMR H'00x0 0000*¹ Retained
Retained
Retained
WDT
Watchdog timer stop time register WDTST H'0000 0000 Retained
Retained
Retained
Watchdog timer control/status
register
WDTCSR H'0000 0000 Retained
Retained
Retained
Watchdog timer base stop time
register
WDTBST H'0000 0000 Retained
Retained
Retained
Watchdog timer counter
WDTCNT H'0000 0000 H'0000 0000 Retained
Retained
Watchdog timer base counter
WDTBCNT H'0000 0000 H'0000 0000 Retained
Retained
Notes: 1. The state of this register depends on the settings of mode pins MODE0 to MODE4,
MODE11, and MODE12 obtained on a power-on reset via the PRESET pin.
2. The state of this register depends on the setting of mode pins MODE11 and MODE12
obtained on a power-on reset via the PRESET pin.
Rev.1.00 Jan. 10, 2008 Page 1542 of 1658
REJ09B0261-0100