SH7785 Datasheet, PDF (672/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

13. PCI Controller (PCIC)
31 29 28 20 19
0
31 29 28 20 19
0
PCI address
SHwy bus
address
Compare
31 29 28
PCIMBAR0/1
20 19
31 29 28 20 19
0
PCILAR0/1
0
31 29 28
PCILSR0/1
20 19
0
MBARE
Figure 13.11 PCI Bus to SuperHyway Bus Address Translation
(2) Accessing PCIC I/O Space
The PCI I/O address space should be allocated as 256 bytes.
The lower eight bits ([7:0]) are sent to the internal bus without translation.
When bits 31 to 8 of a PCI address match bits 31 to 8 of PCIIBAR, the upper 24 bits are replaced
with H'FE04 01 and a PCI local register is accessed.
31
8
7
0
31
87
0
PCI address
SHwy bus address H'FE0401
Compare
31
8
7
0
PCI address
Figure 13.12 I/O Access from PCI Bus to SuperHyway Bus
Rev.1.00 Jan. 10, 2008 Page 642 of 1658
REJ09B0261-0100