SH7785 Datasheet, PDF (374/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Interrupt Controller (INTC)
10.7.2 Notes on Setting IRQ/IRL[7:0] Pin Function
When the IRQ/IRL[7:0] pin functions are switched, the INTC may retain an incorrectly detected
interrupt request. Therefore, mask the IRL and IRQ interrupt requests before switching the
IRQ/IRL[7:0] pin functions.
Table 10.17 Switching Sequence of IRQ/IRL[7:0] Pin Function
Sequence Item
Procedure
1
IRL interrupt request and IRQ interrupt Write 1 to all bits in INTMSK0 and
request masking
INTMSK1 except reserved bits
2
Setting IRL/IRQ[7:4] pins to IRL7 to IRL4 Write 0 to the PMSEL14 bit in PMSELR
Write 0 to the PL4MD1, PL4MD0,
PL3MD1, PL3MD0, PL2MD1, PL2MD0,
PL1MD1, PL1MD0 bits in PLCR
3
Setting IRQ/IRL[7:0] pins to IRL or IRQ Set bits IRLM1 to IRLM0 in ICR0
4
Start of IRL and IRQ interrupt detection Write 1 to the corresponding bit in
INTMSKCLR0 and INTMSKCLR1
Rev.1.00 Jan. 10, 2008 Page 344 of 1658
REJ09B0261-0100