SH7785 Datasheet, PDF (887/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

19. Display Unit (DU)
19.3.6 Color Palette Control Register (CPCR)
The color palette control register (CPCR) is a register which enables switching of the color palette.
For information on color palette switching, refer to section 19.4.8, Color Palettes.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
— — — — — — — — — — — — CP4CE CP3CE CP2CE CP1CE
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R/W R/W R/W R/W
Internal update:
OOOO
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
————————————————
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Internal update:
Bit
Bit Name
31 to 20 ⎯
Initial
Value
All 0
19
CP4CE 0
Internal
R/W Update Description
R
⎯
Reserved
These bits are always read as 0. The write value
should always be 0.
R/W Yes
Color Palette 4 Change Enable
0: Switching of color palette 4 is not performed.
1: Switching of color palette 4 is performed.
Switching is performed when the DRES bit in
DSYSR is changed from 1 to 0, or with the
timing of an internal update. This bit can only
be set to 1; an operation to set the bit to 0 is
invalid. After switching of the color palette 4,
the bit is cleared to 0.
When setting to 1 and clearing occur
simultaneously, clearing to 0 takes priority.
Rev.1.00 Jan. 10, 2008 Page 857 of 1658
REJ09B0261-0100