SH7785 Datasheet, PDF(1075/1692 Page) Renesas Technology Corp – 32-Bit RISC Microcomputer

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

SH7785 Datasheet, PDF (1075/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

◁

21. Serial Communication Interface with FIFO (SCIF)

Ch. Register Name

Abbrev.

Power-on Reset

by PRESET Pin/

WDT/H-UDI

Manual Reset

by WDT/Multiple

Exception

Sleep/Deep

Sleep

by SLEEP

Instruction

4

Serial mode register 4

SCSMR4 H'0000

H'0000

Retained

Bit rate register 4

SCBRR4 H'FF

H'FF

Retained

Serial control register 4

SCSCR4 H'0000

H'0000

Retained

Transmit FIFO data register 4

SCFTDR4 Undefined

Undefined

Retained

Serial status register 4

SCFSR4 H'0060

H'0060

Retained

Receive FIFO data register 4

SCFRDR4 Undefined

Undefined

Retained

FIFO control register 4

SCFCR4 H'0000

H'0000

Retained

Transmit FIFO data count register 4 SCTFDR4 H'0000

H'0000

Retained

Receive FIFO data count register 4 SCRFDR4 H'0000

Serial port register 4

SCSPTR4 H'0000*4

H'0000

H'0000*4

Retained

Retained

Line status register 4

SCLSR4 H'0000

H'0000

Retained

5

Serial mode register 5

SCSMR5 H'0000

H'0000

Retained

Bit rate register 5

SCBRR5 H'FF

H'FF

Retained

Serial control register 5

SCSCR5 H'0000

H'0000

Retained

Transmit FIFO data register 5

SCFTDR5 Undefined

Undefined

Retained

Serial status register 5

SCFSR5 H'0060

H'0060

Retained

Receive FIFO data register 5

SCFRDR5 Undefined

Undefined

Retained

FIFO control register 5

SCFCR5 H'0000

H'0000

Retained

Transmit FIFO data count register 5 SCTFDR5 H'0000

H'0000

Retained

Receive FIFO data count register 5 SCRFDR5 H'0000

Serial port register 5

SCSPTR5 H'0000*4

H'0000

H'0000*4

Retained

Retained

Line status register 5

SCLSR5 H'0000

H'0000

Retained

Serial error register 5

SCRER5 H'0000

H'0000

Notes: 1. Only 0 can be written to bits 7 to 4, 1, and 0 to clear the flags.

2. Only 0 can be written to bit 0 to clear the flags.

3. Bits 2 and 0 are undefined.

4. Bits 6, 4, 2, and 0 are undefined.

Retained

Module

Standby

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Retained

Rev.1.00 Jan. 10, 2008 Page 1045 of 1658

REJ09B0261-0100

▷