SH7785 Datasheet, PDF (105/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

4. Pipelining
(6-19) FIPR: 1 issue cycle
I1
I2
I3
ID FE1 FE2 FE3 FE4 FE5 FE6 FS
(6-20) FTRV: 1 issue cycle
I1
I2
I3
(6-21) FSRRA: 1 issue cycle
I1
I2
I3
(6-22) FSCA: 1 issue cycle
I1
I2
I3
ID FE1 FE2 FE3 FE4 FE5 FE6 FS
FE1 FE2 FE3 FE4 FE5 FE6 FS
FE1 FE2 FE3 FE4 FE5 FE6 FS
FE1 FE2 FE3 FE4 FE5 FE6 FS
ID FE1 FE2 FE3 FE4 FE5 FE6 FS
FEPL
Function computing unit occupied cycle
ID FE1 FE2 FE3 FE4 FE5 FE6 FS
FE1 FE2 FE3 FE4 FE5 FE6 FS
FE1 FE2 FE3 FE4 FE5 FE6 FS
FEPL
Function computing unit occupied cycle
Figure 4.2 Instruction Execution Patterns (9)
Rev.1.00 Jan. 10, 2008 Page 75 of 1658
REJ09B0261-0100