SH7785 Datasheet, PDF (1609/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

32. Electrical Characteristics
CLKOUT
A25 to A5
A4 to A0
CSn
RD/WR
RD
D31 to D0
(Read)
BS
T1 TB2 TB1 TB2 TB1 TB2 TB1 T2
t_AD
t_AD
t_AD
t_CSD
t_RWD
t_RSD
t_RSD
t_RDS
t_BSD
t_BSD
t_RDH
t_RDS
t_CSD
t_RWD
t_RSD
t_RDH
RDY
DACKn
(SA: IO ← memory)
DACKn
(DA)
t_DACD
t_DACD
t_DACD
t_DACD
Legend:
IO: DACK device
SA: Single-address DMA transfer
DA: Dual-address DMA transfer
Note: DACK is configured as active-high.
t_DACD
Figure 32.13 Burst ROM Bus Cycle (No Wait)
Rev.1.00 Jan. 10, 2008 Page 1579 of 1658
REJ09B0261-0100