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| SH7785 Datasheet, PDF (1606/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer | |||
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32. Electrical Characteristics
CLKOUT
A25 to A0
CSn
RD/WR
RD
T1
Tw
T2
tAD
tCSD
tRWD
tRSD
tRSD
tAD
tCSD
tRWD
tRSD
D31 to D0
(Read)
WEn
tWED1
tWEDF
tRDS
tRDH
tWEDF
D31 to D0
(Write)
tWDD
tWDD
tWDD
tBSD
tBSD
BS
RDY
tRDYS
tDACD
DACKn
(SA: IO â memory)
DACKn
(SA: IO â memory)
tDACDF
tDACD
tRDYH
tDACD
tDACDF
DACKn
(DA)
tDACD
Legend:
IO: DACK device
SA: Single-address DMA transfer
DA: Dual-address DMA transfer
Note: DACK is configured as active-high.
tDACD
Figure 32.10 SRAM Bus Cycle: Basic Bus Cycle (One Internal Wait Cycle)
Rev.1.00 Jan. 10, 2008 Page 1576 of 1658
REJ09B0261-0100
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