SH7785 Datasheet, PDF (1537/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

30. User Debugging Interface (H-UDI)
30.4.4 H-UDI Interrupt
The H-UDI interrupt function generates an interrupt by setting a command value in SDIR through
the H-UDI. The H-UDI interrupt function is general exception or interrupt operation, that is,
execution is branched to the address based on VBR and is returned to the branch source by the
RTE instruction. In this case, the exception code stored in INTEVT is H'600. Also, the priority of
the H-UDI interrupt is controlled by bits 28 to 24 in INT2PRI4. For details, see section 10,
Interrupt Controller (INTC).
An H-UDI interrupt request signal is asserted when the INTREQ bit in SDINT is set to 1 after
setting the command (Update-IRQ). Since the interrupt request signal is not negated unless the
INTREQ bit is cleared to 0 by software, the interrupt request cannot be missed. While the H-UDI
interrupt command is set in SDIR, SDINT is connected between the TDI and TDO pins. For
values read through the TDO pin and others, see section 30.3.2, Interrupt Source Register
(SDINT).
30.5 Usage Notes
1. Once the SDIR command is set, it is not changed unless a command is written through the H-
UDI, except the assertion of TRST or initialization by changing the TAP to the Test-Logic-
Reset state.
2. Sleep mode and deep sleep mode are released by an H-UDI interrupt or H-UDI reset, and these
modes accept the interrupt and reset requests.
3. The H-UDI is used to connect an emulator. Therefore, the JTAG functions cannot be used
when an emulator is used.
Rev.1.00 Jan. 10, 2008 Page 1507 of 1658
REJ09B0261-0100