SH7785 Datasheet, PDF (1068/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

21. Serial Communication Interface with FIFO (SCIF)
Reset
R
Q
D3
D
SCKIO
C
SPTRW
Peripheral bus
SCIFn_SCK
Reset
R
D2
QD
SCKDT
C
SPTRW
Clock output enable signal*
Serial clock output signal*
Serial clock input signal*
Serial input enable signal*
Legend:
SPTRW: Write to SCSPTR
SPTRR: Read from SCSPTR
SPTRR
Note: * The SCIFn_SCK pin function is designated as internal clock output or external clock input
by the C/A bit in SCSMR and the CKE1 and CKE0 bits in SCSCR.
Figure 21.4 SCIFn_SCK Pin (n = 0 to 5)
Reset
R
Q
D
D1
SPB2IO
C
SPTRW
Peripheral bus
SCIFn_TXD
Reset
R
D0
QD
SPB2DT
C
SPTRW
Transmit enable signal
Serial transmit data
Legend:
SPTRW: Write to SCSPTR
Figure 21.5 SCIFn_TXD Pin (n = 0 to 5)
Rev.1.00 Jan. 10, 2008 Page 1038 of 1658
REJ09B0261-0100