SH7785 Datasheet, PDF (1639/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

32. Electrical Characteristics
32.3.13 SIOF Module Signal Timing
Table 32.18 SIOF Module Signal Timing
Item
SIOF_MCLK clock input cycle time
SIOF_MCLK input high level width
SIOF_MCLK input low level width
SIOF_SCK clock cycle time
SIOF_SCK output high level width
SIOF_SCK output low level width
SIOF_SYNC output delay time
SIOF_SCK input high level width
SIOF_SCK input low level width
SIOF_SYNC input setup time
SIOF_SYNC input hold time
SIOF_TXD output delay time
SIOF_RXD input setup time
SIOF_RXD input hold time
Symbol
t_MCYC
t
MWH
t
MWL
t
SICYC
t
SWHO
t
SWLO
t_FSD
t_SWHI
t_SWLI
t_FSS
t
FSH
t
STDD
t
SRDS
T
SRDH
Min.
t_pcyc
0.4 × t
MCYC
0.4 × t
MCYC
t
pcyc
0.4 × t
SICYC
0.4 × t
SICYC
—
0.4 × t_SICYC
0.4 × t_SICYC
10
10
—
10
10
Max. Unit Figure
—
ns 32.50
—
ns
—
ns
—
ns 32.51 to 32.55
—
ns 32.51 to 32.54
—
ns
10 ns
—
ns 32.55
—
ns
—
ns
—
ns
10 ns 32.51 to 32.55
—
ns
—
ns
t_MCYC
SIOF_MCLK
t_MWH
t_MWL
Figure 32.50 SIOF_MCLK Input Timing
Rev.1.00 Jan. 10, 2008 Page 1609 of 1658
REJ09B0261-0100