SH7785 Datasheet, PDF (18/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

16.4.1 Reset Request ..................................................................................................... 769
16.4.2 Using Watchdog Timer Mode ............................................................................ 771
16.4.3 Using Interval Timer Mode ................................................................................ 771
16.4.4 Time until WDT Counters Overflow.................................................................. 772
16.4.5 Clearing WDT Counters ..................................................................................... 773
16.5 Status Pin Change Timing during Reset ............................................................................ 774
16.5.1 Power-On Reset by PRESET Pin ....................................................................... 774
16.5.2 Power-On Reset by Watchdog Timer Overflow................................................. 777
16.5.3 Manual Reset by Watchdog Timer Overflow ..................................................... 779
Section 17 Power-Down Mode ........................................................................................ 781
17.1 Features.............................................................................................................................. 781
17.1.1 Types of Power-Down Modes ............................................................................ 781
17.2 Input/Output Pins............................................................................................................... 783
17.3 Register Descriptions......................................................................................................... 783
17.3.1 Sleep Control Register (SLPCR) ........................................................................ 785
17.3.2 Standby Control Register 0 (MSTPCR0) ........................................................... 786
17.3.3 Standby Control Register 1 (MSTPCR1) ........................................................... 789
17.3.4 Standby Display Register (MSTPMR) ............................................................... 791
17.4 Sleep Mode ........................................................................................................................ 793
17.4.1 Transition to Sleep Mode.................................................................................... 793
17.4.2 Releasing Sleep Mode ........................................................................................ 793
17.5 Deep Sleep Mode............................................................................................................... 794
17.5.1 Transition to Deep Sleep Mode .......................................................................... 794
17.5.2 Releasing Deep Sleep Mode ............................................................................... 795
17.6 Module Standby Functions ................................................................................................ 796
17.6.1 Transition to Module Standby Mode .................................................................. 796
17.6.2 Releasing Module Standby Functions ................................................................ 796
17.7 Timing of the Changes on the STATUS Pins .................................................................... 797
17.7.1 Reset ................................................................................................................... 797
17.7.2 Releasing Sleep Mode ........................................................................................ 797
17.8 DDR-SDRAM Power Supply Backup............................................................................... 797
Section 18 Timer Unit (TMU).......................................................................................... 799
18.1 Features.............................................................................................................................. 799
18.2 Input/Output Pins............................................................................................................... 801
18.3 Register Descriptions......................................................................................................... 802
18.3.1 Timer Start Registers (TSTRn) (n = 0, 1) ........................................................... 804
18.3.2 Timer Constant Registers (TCORn) (n = 0 to 5) ................................................ 806
18.3.3 Timer Counters (TCNTn) (n = 0 to 5) ................................................................ 806
Rev.1.00 Jan. 10, 2008 Page xviii of xxx
REJ09B0261-0100