SH7785 Datasheet, PDF (360/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Interrupt Controller (INTC)
Table 10.13 Interrupt Exception Handling and Priority
Interrupt Source
INTEVT Interrupt Mask/Clear
Code Priority Register & Bit
Priority
Interrupt Detail within
Source Source Sets of Default
Register Register Sources Priority
NMI
⎯
H'1C0 16
⎯
⎯
⎯
High
IRL
IRL[3:0] = LLLL (H'0) H'200 15
L: Low
level
input
IRL[7:4] = LLLL (H'0) H'B00
H: High
level
IRL[3:0] = LLLH (H'1) H'220 14
input
(See
IRL[7:4] = LLLH (H'1) H'B20
table
10.11) _{IRL[3:0] = LLHL (H'2) H'240 13}
IRL[7:4] = LLHL (H'2) H'B40
INTMSK2[31]
⎯
INTMSKCLR2[31]
INTMSK2[15]
⎯
INTMSKCLR2[15]
INTMSK2[14]
⎯
INTMSKCLR2[14]
INTMSK2[30]
⎯
INTMSKCLR2[30]
INTMSK2[13]
⎯
INTMSKCLR2[13]
INTMSK2[29]
⎯
INTMSKCLR2[29]
⎯
High
⎯
Low
⎯
High
⎯
Low
⎯
High
⎯
Low
IRL[3:0] = LLHH (H'3) H'260 12
IRL[7:4] = LLHH (H'3) H'B60
IRL[3:0] = LHLL (H'4) H'280 11
INTMSK2[12]
⎯
INTMSKCLR2[12]
INTMSK2[28]
⎯
INTMSKCLR2[28]
INTMSK2[11]
⎯
INTMSKCLR2[11]
⎯
High
⎯
Low
⎯
High
IRL[7:4] = LHLL (H'4) H'B80
IRL[3:0] = LHLH (H'5) H'2A0 10
IRL[7:4] = LHLH (H'5) H'BA0
INTMSK2[27]
⎯
INTMSKCLR2[27]
INTMSK2[10]
⎯
INTMSKCLR2[10]
INTMSK2[26]
⎯
INTMSKCLR2[26]
⎯
Low
⎯
High
⎯
Low
IRL[3:0] = LHHL (H'6) H'2C0 9
IRL[7:4] = LHHL (H'6) H'BC0
IRL[3:0] = LHHH (H'7) H'2E0 8
INTMSK2[9]
⎯
⎯
High
INTMSKCLR2[9]
INTMSK2[25]
⎯
⎯
Low
INTMSKCLR2[25]
INTMSK2[8]
⎯
⎯
High
INTMSKCLR2[8]
IRL[7:4] = LHHH (H'7) H'BE0
INTMSK2[24]
⎯
⎯
Low
INTMSKCLR2[24]
Low
Rev.1.00 Jan. 10, 2008 Page 330 of 1658
REJ09B0261-0100