SH7785 Datasheet, PDF (573/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

12. DDR2-SDRAM Interface (DBSC2)
MCK0,
MCK1
MCKE
MCS
MRAS
MCAS
MWE
MA[14:11]
MA[9:0]
MA[10]
MBA[2:0]
High level
Invalid
Invalid
Invalid
tRFC
= 6 cycles
Valid Invalid Valid
Valid Invalid Valid
Valid Invalid Valid
Invalid
Invalid
Invalid
MDQS[3:0]
MDM[3:0]
Invalid
MDQ[31:0]
Invalid
SDRAM
command
REF
ACT
any
bank
READ
any
bank
Figure 12.20 tRFC
Figure 12.20 is an example of a case in which, after issuing a REF command, a READ request is
issued. In order to issue the ACT commend after issuing the REF command, the DBSC2 waits for
a time stipulated by tRFC.
Rev.1.00 Jan. 10, 2008 Page 543 of 1658
REJ09B0261-0100