SH7785 Datasheet, PDF (445/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Local Bus State Controller (LBSC)
CLKOUT
A25 to A5
A4 to A0
CSn
R/W
RD
D31 to D0
(In reading)
BS
RDY
DACKn *¹
TAS1 T1 TS1 TB2 TB1 TB2 TB1 TB2 TB1 T2 TH1 TAH1
*²
Notes: 1. In this example, DACKn is active-high.
2. When RDSPL in CSnBCR is set to 1.
Figure 11.14 Burst ROM Wait Timing
Rev.1.00 Jan. 10, 2008 Page 415 of 1658
REJ09B0261-0100