SH7785 Datasheet, PDF (791/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

16. Watchdog Timer and Reset (WDT)
16.2 Input/Output Pins
Table 16.1 shows the pin configuration of the WDT module.
Table 16.1 Pin Configuration
Pin name
PRESET
Function
I/O
Power-on reset input Input
MRESETOUT Manual reset output Output
STATUS[1:0]
Status output
Output
Description
A low level input to this pin places the LSI in
the power-on reset state.
Low level is output during manual reset
execution.
This pin is multiplexed with the IRQOUT
(INTC) pin.
Indicate the LSI's operating status
STATUS1 STATUS0 Operating Status
High
High
Reset
High
Low
Sleep mode
Low
Low
Normal operation
The STATUS1 pin is multiplexed with the
DRAK1 (DMAC) and PK6 (GPIO) pins.
The STATUS0 pin is multiplexed with the
DRAK0 (DMAC) and PK7 (GPIO) pins.
Rev.1.00 Jan. 10, 2008 Page 761 of 1658
REJ09B0261-0100