SH7785 Datasheet, PDF (1073/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

21. Serial Communication Interface with FIFO (SCIF)
Table 21.2 Register Configuration (2)
Ch. Register Name
Abbrev.
Power-on Reset
by PRESET Pin/
WDT/H-UDI
Manual Reset
by WDT/Multiple
Exception
Sleep/Deep
Sleep
by SLEEP
Instruction
Module
Standby
0
Serial mode register 0
SCSMR0 H'0000
H'0000
Retained
Retained
Bit rate register 0
SCBRR0 H'FF
H'FF
Retained
Retained
Serial control register 0
SCSCR0 H'0000
H'0000
Retained
Retained
Transmit FIFO data register 0
SCFTDR0 Undefined
Undefined
Retained
Retained
Serial status register 0
SCFSR0 H'0060
H'0060
Retained
Retained
Receive FIFO data register 0
SCFRDR0 Undefined
Undefined
Retained
Retained
FIFO control register 0
SCFCR0 H'0000
H'0000
Retained
Retained
Transmit FIFO data count register 0 SCTFDR0 H'0000
H'0000
Retained
Retained
Receive FIFO data count register 0 SCRFDR0 H'0000
H'0000
Retained
Retained
Serial port register 0
SCSPTR0 H'0000*³
H'0000*³
Retained
Retained
Line status register 0
SCLSR0 H'0000
H'0000
Retained
Retained
Serial error register 0
SCRER0 H'0000
H'0000
Retained
Retained
1
Serial mode register 1
SCSMR1 H'0000
H'0000
Retained
Retained
Bit rate register 1
SCBRR1 H'FF
H'FF
Retained
Retained
Serial control register 1
SCSCR1 H'0000
H'0000
Retained
Retained
Transmit FIFO data register 1
SCFTDR1 Undefined
Undefined
Retained
Retained
Serial status register 1
SCFSR1 H'0060
H'0060
Retained
Retained
Receive FIFO data register 1
SCFRDR1 Undefined
Undefined
Retained
Retained
FIFO control register 1
SCFCR1 H'0000
H'0000
Retained
Retained
Transmit FIFO data count register 1 SCTFDR1 H'0000
H'0000
Retained
Retained
Receive FIFO data count register 1 SCRFDR1 H'0000
H'0000
Retained
Retained
Serial port register 1
SCSPTR1 H'0000*⁴
H'0000*⁴
Retained
Retained
Line status register 1
SCLSR1 H'0000
H'0000
Retained
Retained
Serial error register 1
SCRER1 H'0000
H'0000
Retained
Retained
Rev.1.00 Jan. 10, 2008 Page 1043 of 1658
REJ09B0261-0100