SH7785 Datasheet, PDF (348/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Interrupt Controller (INTC)
(4) INT2B3: Detailed Interrupt Sources for the PCIC
Module
PCIC
Bit
31 to 10
9
8
7
6
5
4
3
2
1
0
Name
⎯
PCIPWD0
PCIPWD1
PCIPWD2
PCIPWD3
PCIERR
PCIINTD
PCIINTC
PCIINTB
PCIINTA
PCISERR
Detailed Source
Description
Reserved
PCIC interrupt sources are indicated.
These bits are read as ^{This register indicates the PCIC}
0 and cannot be
interrupt sources even if the mask
modified.
setting for PCIC is made in the
interrupt mask register.
PCIC power state D0
state interrupt
PCIC power state D1
state interrupt
PCIC power state D2
state interrupt
PCIC power state D3
state interrupt
PCIC error interrupt
PCIC INTD interrupt
PCIC INTC interrupt
PCIC INTB interrupt
PCIC INTA interrupt
PCIC SERR interrupt
Rev.1.00 Jan. 10, 2008 Page 318 of 1658
REJ09B0261-0100