SH7785 Datasheet, PDF (1028/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

20. Graphics Data Translation Accelerator (GDTA)
20.3.19 CL Output Padding Size Setting Register (CLOPR)
CLOPR is in the CL register block and sets the output padding size in byte units.
BIt: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
BIt: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
⎯⎯⎯⎯
CL_OP
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: ⎯ ⎯ ⎯ ⎯ R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit Name
31 to 12 ⎯
11 to 0 CL_OP
Initial
Value R/W Description
All 0 ⎯
Reserved
These bits are always read as 0. The write value should
always be 0.
All 0 R/W Output padding size setting
Should be set in byte units.
Value set should be 2 × n (n: an integer greater than 0)
Rev.1.00 Jan. 10, 2008 Page 998 of 1658
REJ09B0261-0100