SH7785 Datasheet, PDF(739/1692 Page) Renesas Technology Corp – 32-Bit RISC Microcomputer

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SH7785 Datasheet, PDF (739/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

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14. Direct Memory Access Controller (DMAC)

14.4.3 DMA Transfer Types

Tables 14.9 and 14.10 show the transfer directions that can be supported by the DMAC.

DMA transfer type supports dual address mode. A data transfer timing depends on the bus mode.

Bus modes include cycle steal mode and burst mode.

Table 14.9 DMA Transfer Directions for Auto-Request and External Request*2

Transfer Destination

Transfer Source

LBSC

Space

DBSC

Space

PCIC Space

On-Chip

Peripheral

Module*1

L or U

Memory

LBSC Space

Y

Y

Y

Y

Y

DBSC Space

Y

Y

Y

Y

Y

PCIC Space

Y

Y

Y

Y

Y

On-Chip Peripheral

Y

Y

Y

Module*1

Y

Y

L or U Memory

Y

Y

Y

Y

Y

Legend:

Y: Transfer is enabled.

Notes: 1. This is the access size that is permitted by a register when the transfer source or

destination is a peripheral module.

2. External requests apply to only channels 0 to 3.

Rev.1.00 Jan. 10, 2008 Page 709 of 1658

REJ09B0261-0100

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