SH7785 Datasheet, PDF (880/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

19. Display Unit (DU)
Initial
Internal
Bit
Bit Name Value R/W Update Description
20
DFB5
0
R
None Display Frame Buffer 5 Flag
0: The address indicated by the plane 5 display
area start address 0 register (P5DSA0R) in
plane 5 is being used as the display area start
address
1: The address indicated by the plane 5 display
area start address 1 register (P5DSA1R) in
plane 5 is being used as the display area start
address
19
DFB4
0
R
None Display Frame Buffer 4 Flag
0: The address indicated by the plane 4 display
area start address 0 register (P4DSA0R) in
plane 4 is being used as the display area start
address
1: The address indicated by the plane 4 display
area start address 1 register (P4DSA1R) in
plane 4 is being used as the display area start
address
18
DFB3
0
R
None Display Frame Buffer 3 Flag
0: The address indicated by the plane 3 display
area start address 0 register (P3DSA0R) in
plane 3 is being used as the display area start
address
1: The address indicated by the plane 3 display
area start address 1 register (P3DSA1R) in
plane 3 is being used as the display area start
address
17
DFB2
0
R
None Display Frame Buffer 2 Flag
0: The address indicated by the plane 2 display
area start address 0 register (P2DSA0R) in
plane 2 is being used as the display area start
address
1: The address indicated by the plane 2 display
area start address 1 register (P2DSA1R) in
plane 2 is being used as the display area start
address
Rev.1.00 Jan. 10, 2008 Page 850 of 1658
REJ09B0261-0100