307013-003 Datasheet, PDF (86/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

Intel^® ICH7 Pin States
Table 3-4. Power Plane and States for Output and I/O Signals for Mobile/Ultra Mobile
Only Configurations (Sheet 1 of 4)
Signal Name
Power
Plane
During
PLTRST#¹ /
RSMRST#²
Immediately
after
PLTRST#¹ /
RSMRST#²
C3/C4
S1
S3_COLD3
S4/
S5
PETp[6:1],
PETn[6:1]
DMI[3:0]TXP,
DMI[3:0]TXN
AD[31:0]
C/BE[3:0]#
CLKRUN#
DEVSEL#
FRAME#
GNT[3:0]#
GNT4# / GPIO48
GNT5# / GPIO17
IRDY#, TRDY#
PAR
PCIRST#
PERR#
PLOCK#
STOP#
LAD[3:0] /
FWH[3:0]
LFRAME# /
FWH[4]
EE_CS
EE_DOUT
EE_SHCLK
LAN_RSTSYNC
LAN_TXD[2:0]
DA[2:0]
DCS1#, DCS3#
DD[15:8],
DD[6:0]
Core
PCI Express* (Mobile Only)
High
High⁴
Defined
Defined
Core
High
DMI
High⁴
Defined Defined
Core
Core
Core
Core
Core
Core
Core
Core
Suspend
Core
Core
Core
PCI Bus
Low
Low
Low
High-Z
High-Z
Undefined
Undefined
Low
High-Z
High-Z
High with
Internal Pull-
ups
High
High-Z
Low
Low
High-Z
High-Z
High-Z
High-Z
Undefined
High
High-Z
High-Z
High-Z
LPC Interface
Defined
Defined
Defined
High-Z
High-Z
Defined
Defined
High-Z
High-Z
High
High
High-Z
Defined
High
High-Z
High-Z
High-Z
High-Z
Defined
High
High-Z
High-Z
High-Z
Core
High
High
High
High
Core
High
High
High
High
LAN Connect and EEPROM Interface (Mobile Only)
LAN
LAN
LAN
LAN
LAN
Low
High
High-Z
High
Low
Running
High
Running
Low
Low
Defined
Defined
Defined
Defined
Defined
Defined
Defined
Defined
Defined
Defined
IDE Interface
Core
Core
Undefined
High
Undefined
High
Undefine
d
High
Undefine
d
High
Core
High-Z
High-Z
Defined High-Z
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Low
Off
Off
Off
Off
Off
Note 5
Note 5
Note 5
Note 5
Note 5
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Low
Off
Off
Off
Off
Off
Note 5
Note 5
Note 5
Note 5
Note 5
Off
Off
Off
86
Intel ^® ICH7 Family Datasheet