307013-003 Datasheet, PDF (602/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

IDE Controller Registers (D31:F1)
15.1.1
VID—Vendor Identification Register (IDE—D31:F1)
Offset Address: 00h–01h
Default Value: 8086h
Lockable:
No
Attribute:
Size:
Power Well:
RO
16-bit
Core
15.1.2
Bit
Description
15:0 Vendor ID — RO. This is a 16-bit value assigned to Intel. Intel VID = 8086h
DID—Device Identification Register (IDE—D31:F1)
Offset Address: 02h–03h
Default Value: See bit description
Lockable:
No
Attribute:
Size:
Power Well:
RO
16-bit
Core
15.1.3
Bit
15:0
Description
Device ID — RO. This is a 16-bit value assigned to the Intel^® ICH7 IDE controller. Refer
to the Intel^® I/O Controller Hub 7 (ICH7) Family Specification Update for the value of
the Device ID Register.
PCICMD—PCI Command Register (IDE—D31:F1)
Address Offset: 04h–05h
Default Value: 00h
Attribute:
Size:
RO, R/W
16 bits
Bit
Description
15:11 Reserved
Interrupt Disable (ID) — R/W.
10 ^{0 = Enables the IDE controller to assert INTA# (native mode) or IRQ14/15 (legacy}
mode).
1 = Disable. The interrupt will be deasserted.
9 Fast Back to Back Enable (FBE) — RO. Reserved as 0.
8 SERR# Enable (SERR_EN) — RO. Reserved as 0.
7 Wait Cycle Control (WCC) — RO. Reserved as 0.
6 Parity Error Response (PER) — RO. Reserved as 0.
5 VGA Palette Snoop (VPS) — RO. Reserved as 0.
4 Postable Memory Write Enable (PMWE) — RO. Reserved as 0.
3 Special Cycle Enable (SCE) — RO. Reserved as 0.
2
Bus Master Enable (BME) — R/W. Controls the ICH7’s ability to act as a PCI master
for IDE Bus Master transfers.
Memory Space Enable (MSE) — R/O.
1
This controller does not contain a memory space.
0 I/O Space Enable (IOSE) — RO.
602
Intel ^® ICH7 Family Datasheet