307013-003 Datasheet, PDF (705/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

Intel® High Definition Audio Controller Registers (D27:F0)
19 Intel^® High Definition Audio
Controller Registers (D27:F0)
Note:
Note:
The Intel^® High Definition Audio controller resides in PCI Device 27, Function 0 on bus
0. This function contains a set of DMA engines that are used to move samples of
digitally encoded data between system memory and external codecs.
All registers in this function (including memory-mapped registers) must be addressable
in byte, word, and D-word quantities. The software must always make register
accesses on natural boundaries (i.e. D-word accesses must be on D-word boundaries;
word accesses on word boundaries, etc.) In addition, the memory-mapped register
space must not be accessed with the LOCK semantic exclusive-access mechanism. If
software attempts exclusive-access mechanisms to the Intel High Definition Audio
memory-mapped space, the results are undefined.
Users interested in providing feedback on the Intel High Definition Audio specification
or planning to implement the Intel High Definition Audio specification into a future
product will need to execute the Intel^® High Definition Audio Specification Developer’s
Agreement. For more information, contact [e-mail].
19.1
Intel^® High Definition Audio PCI Configuration
Space (Intel^® High Definition Audio— D27:F0)
Note:
Address locations that are not shown should be treated as Reserved.
Table 19-1. Intel^® High Definition Audio PCI Register Address Map
(Intel^® High Definition Audio D27:F0) (Sheet 1 of 2)
Offset
00h–01h
Mnemonic
Register Name
VID
Vendor Identification
02h–03h
DID
Device Identification
04h–05h
06h–07h
PCICMD
PCISTS
PCI Command
PCI Status
08h
RID
Revision Identification
09h
0Ah
0Bh
0Ch
0Dh
0Eh
10h–13h
14h–17h
2Ch–2Dh
2Eh–2Fh
34h
PI
SCC
BCC
CLS
LT
HEADTYP
HDBARL
HDBARU
SVID
SID
CAPPTR
Programming Interface
Sub Class Code
Base Class Code
Cache Line Size
Latency Timer
Header Type
Intel^® High Definition Audio Lower Base
Address (Memory)
Intel® High Definition Audio Upper Base
Address (Memory)
Subsystem Vendor Identification
Subsystem Identification
Capability List Pointer
Default
Access
8086h
See register
description.
0000h
0010h
See register
description.
00h
03h
04h
00h
00h
00h
RO
RO
R/W, RO
R/WC, RO
RO
RO
RO
RO
R/W
RO
RO
00000004h R/W, RO
00000000h
0000h
0000h
50h
R/W
R/WO
R/WO
RO
Intel ^® ICH7 Family Datasheet
705