307013-003 Datasheet, PDF (253/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

Register and Memory Mapping
6 Register and Memory Mapping
The ICH7 contains registers that are located in the processor’s I/O space and memory
space and sets of PCI configuration registers that are located in PCI configuration
space. This chapter describes the ICH7 I/O and memory maps at the register-set level.
Register access is also described. Register-level address maps and Individual register
bit descriptions are provided in the following chapters. The following notations and
definitions are used in the register/instruction description chapters.
RO
WO
R/W
R/WC
R/WO
R/WLO
Default
Bold
Read Only. In some cases, If a register is read only, writes to this
register location have no effect. However, in other cases, two
separate registers are located at the same location where a read
accesses one of the registers and a write accesses the other
register. See the I/O and memory map tables for details.
Write Only. In some cases, If a register is write only, reads to
this register location have no effect. However, in other cases,
two separate registers are located at the same location where a
read accesses one of the registers and a write accesses the
other register. See the I/O and memory map tables for details.
Read/Write. A register with this attribute can be read and
written.
Read/Write Clear. A register bit with this attribute can be read
and written. However, a write of 1 clears (sets to 0) the
corresponding bit and a write of 0 has no effect.
Read/Write-Once. A register bit with this attribute can be
written only once after power up. After the first write, the bit
becomes read only.
Read/Write, Lock-Once. A register bit with this attribute can be
written to the non-locked value multiple times, but to the locked
value only once. After the locked value has been written, the bit
becomes read only.
When ICH7 is reset, it sets its registers to predetermined default
states. The default state represents the minimum functionality
feature set required to successfully bring up the system. Hence,
it does not represent the optimal system configuration. It is the
responsibility of the system initialization software to determine
configuration, operating parameters, and optional system
features that are applicable, and to program the ICH7 registers
accordingly.
Register bits that are highlighted in bold text indicate that the
bit is implemented in the ICH7. Register bits that are not
implemented or are hardwired will remain in plain text.
All bit(s) or bit-fields must be correctly dealt with by software. On reads, software must
use appropriate masks to extract the defined bits and not rely on reserved bits being
any particular value. On writes, software must ensure that the values of reserved bit
locations are preserved. Any ICH7 configuration register or I/O or memory mapped
location not explicitly indicated in this document must be considered reserved.
Intel ^® ICH7 Family Datasheet
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