|
307013-003 Datasheet, PDF (367/848 Pages) Intel Corporation – Intel I/O Controller Hub 7 | |||
|
◁ |
LPC Interface Bridge Registers (D31:F0)
10.1.7
SCCâSub Class Code Register (LPC I/FâD31:F0)
Offset Address: 0Ah
Default Value: 01h
Attribute:
Size:
RO
8 bits
10.1.8
Bit
Description
Sub Class Code â RO. 8-bit value that indicates the category of bridge for the LPC
7:0 bridge.
01h = PCI-to-ISA bridge.
BCCâBase Class Code Register (LPC I/FâD31:F0)
Offset Address: 0Bh
Default Value: 06h
Attribute:
Size:
RO
8 bits
10.1.9
Bit
Description
Base Class Code â RO. 8-bit value that indicates the type of device for the LPC
7:0 bridge.
06h = Bridge device.
PLTâPrimary Latency Timer Register (LPC I/FâD31:F0)
Offset Address: 0Dh
Default Value: 00h
Attribute:
Size:
RO
8 bits
Bit
Description
7:3 Master Latency Count (MLC) â Reserved.
2:0 Reserved.
10.1.10 HEADTYPâHeader Type Register (LPC I/FâD31:F0)
Offset Address: 0Eh
Default Value: 80h
Attribute:
Size:
RO
8 bits
Bit
Description
7 Multi-Function Device â RO. This bit is 1 to indicate a multi-function device.
6:0
Header Type â RO. This 7-bit field identifies the header layout of the configuration
space.
Intel ® ICH7 Family Datasheet
367
|
▷ |