307013-003 Datasheet, PDF (665/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

PCI Express* Configuration Registers (Desktop and Mobile Only)
18 PCI Express* Configuration
Registers (Desktop and Mobile
Only)
Note:
PCI Express is not supported on ICH7-U Ultra Mobile.
18.1
PCI Express* Configuration Registers
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Note:
/
Register address locations that are not shown in Table 18-1 should be treated as
Reserved.
Table 18-1. PCI Express* Configuration Registers Address Map
(PCI Express—D28:F0/F1/F2/F3/F4/F5) (Sheet 1 of 2)
Offset Mnemonic
Register Name
00h–01h
02h–03h
04h–05h
06h–07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
18h–1Ah
1Ch–1Dh
1Eh–1Fh
20h–23h
24h–27h
28h–2Bh
2Ch–2Fh
34h
3Ch–3Dh
3Eh–3Fh
40h–41h
42h–43h
44h–47h
48h–49h
4Ah–4Bh
VID
Vendor Identification
DID
Device Identification
PCICMD
PCISTS
PCI Command
PCI Status
RID
Revision Identification
PI
SCC
BCC
CLS
PLT
HEADTYP
BNUM
IOBL
SSTS
MBL
PMBL
PMBU32
PMLU32
CAPP
INTR
BCTRL
CLIST
XCAP
DCAP
DCTL
DSTS
Programming Interface
Sub Class Code
Base Class Code
Cache Line Size
Primary Latency Timer
Header Type
Bus Number
I/O Base and Limit
Secondary Status
Memory Base and Limit
Prefetchable Memory Base and Limit
Prefetchable Memory Base Upper 32 Bits
Prefetchable Memory Limit Upper 32 Bits
Capabilities List Pointer
Interrupt Information
Bridge Control
Capabilities List
PCI Express* Capabilities
Device Capabilities
Device Control
Device Status
Function 0–5
Default
8086h
See register
description.
0000h
0010h
See register
description.
00h
04h
06h
00h
00h
81h
000000h
0000h
0000h
00000000h
00010001h
00000000h
00000000h
40h
See bit description
0000h
8010
0041
00000FE0h
0000h
0010h
Type
RO
RO
R/W, RO
R/WC, RO
RO
RO
RO
RO
R/W
RO
RO
R/W
R/W, RO
R/WC
R/W
R/W, RO
R/W
R/W
RO
R/W, RO
R/W
RO
R/WO, RO
RO
R/W, RO
R/WC, RO
Intel ^® ICH7 Family Datasheet
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