307013-003 Datasheet, PDF (342/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

LAN Controller Registers (B1:D8:F0) (Desktop and Mobile Only)
8.3.22
PMSK2—Polling Mask 2 Register
(ASF Controller—B1:D8:F0)
Offset Address: F9h
Default Value: XXh
Attribute:
Size:
R/W
8 bits
This register provides software an interface for the Polling #2 Data Mask.
Bit
Description
Polling Mask for Polling Descriptor #2 (POL2_MSK) — R/W. This field is used to
7:0 read and write the data mask for Polling Descriptor #2. Software should only access
this register when the ASF controller is GLOBAL DISABLED.
8.3.23
PMSK3—Polling Mask 3 Register
(ASF Controller—B1:D8:F0)
Offset Address: FAh
Default Value: XXh
Attribute:
Size:
R/W
8 bits
This register provides software an interface for the Polling #3 Data Mask.
Bit
Description
Polling Mask for Polling Descriptor #3 (POL3_MSK) — R/W. This register is used
7:0 to read and write the data mask for Polling Descriptor #3. Software should only access
this register when the ASF controller is GLOBAL DISABLED.
8.3.24
PMSK4—Polling Mask 4 Register
(ASF Controller—B1:D8:F0)
Offset Address: FBh
Default Value: XXh
Attribute:
Size:
R/W
8 bits
This register provides software an interface for the Polling #4 Data Mask.
Bit
Description
Polling Mask for Polling Descriptor #4 (POL4_MSK) — R/W. This register is used
7:0 to read and write the data mask for Polling Descriptor #4. Software should only access
this register when the ASF controller is GLOBAL DISABLED.
342
Intel ^® ICH7 Family Datasheet