307013-003 Datasheet, PDF (343/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

LAN Controller Registers (B1:D8:F0) (Desktop and Mobile Only)
8.3.25
PMSK5—Polling Mask 5 Register
(ASF Controller—B1:D8:F0)
Offset Address: FCh
Default Value: XXh
Attribute:
Size:
R/W
8 bits
This register provides software an interface for the Polling #5 Data Mask.
Bit
Description
Polling Mask for Polling Descriptor #5 (POL5_MSK) — R/W. This register is used
7:0 to read and write the data mask for Polling Descriptor #5. Software should only access
this register when the ASF controller is GLOBAL DISABLED.
8.3.26
PMSK6—Polling Mask 6 Register
(ASF Controller—B1:D8:F0)
Offset Address: FDh
Default Value: XXh
Attribute:
Size:
R/W
8 bits
This register provides software an interface for the Polling #6 Data Mask.
Bit
Description
Polling Mask for Polling Descriptor #6 (POL6_MSK) — R/W. This register is used
7:0 to read and write the data mask for Polling Descriptor #6. Software should only access
this register when the ASF controller is GLOBAL DISABLED.
8.3.27
PMSK7—Polling Mask 7 Register
(ASF Controller—B1:D8:F0)
Offset Address: FEh
Default Value: XXh
Attribute:
Size:
R/W
8 bits
This register provides software an interface for the Polling #7 Data Mask.
Bit
Description
Polling Mask for Polling Descriptor #7 (POL7_MSK) — R/W. This register is used
7:0 to read and write the data mask for Polling Descriptor #7. Software should only access
this register when the ASF controller is GLOBAL DISABLED.
Intel ^® ICH7 Family Datasheet
343