307013-003 Datasheet, PDF (41/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

Introduction
Chapter 6. Register and Memory Mappings
Chapter 6 provides an overview of the registers, fixed I/O ranges, variable I/O ranges
and memory ranges decoded by the ICH7.
Chapter 7. Chipset Configuration Registers
Chapter 7 provides a detailed description of all registers and base functionality that is
related to chipset configuration and not a specific interface (such as LPC, PCI, or PCI
Express). It contains the root complex register block, which describes the behavior of
the upstream internal link.
Chapter 8. LAN Controller Registers
Chapter 8 provides a detailed description of all registers that reside in the ICH7’s
integrated LAN controller. The integrated LAN controller resides on the ICH7’s external
PCI bus (typically Bus 1) at Device 8, Function 0 (B1:D8:F0).
Chapter 9. PCI-to-PCI Bridge Registers
Chapter 9 provides a detailed description of all registers that reside in the PCI-to-PCI
bridge. This bridge resides at Device 30, Function 0 (D30:F0).
Chapter 10. LPC Bridge Registers
Chapter 10 provides a detailed description of all registers that reside in the LPC bridge.
This bridge resides at Device 31, Function 0 (D31:F0). This function contains registers
for many different units within the ICH7 including DMA, Timers, Interrupts, Processor
Interface, GPIO, Power Management, System Management and RTC.
Chapter 11. SATA Controller Registers
Chapter 12 provides a detailed description of all registers that reside in the SATA
controller. This controller resides at Device 31, Function 2 (D31:F2).
Chapter 12. UHCI Controller Registers
Chapter 11 provides a detailed description of all registers that reside in the four UHCI
host controllers. These controllers reside at Device 29, Functions 0, 1, 2, and 3
(D29:F0/F1/F2/F3).
Chapter 13. EHCI Controller Registers
Chapter 13 provides a detailed description of all registers that reside in the EHCI host
controller. This controller resides at Device 29, Function 7 (D29:F7).
Chapter 14. SMBus Controller Registers
Chapter 14 provides a detailed description of all registers that reside in the SMBus
controller. This controller resides at Device 31, Function 3 (D31:F3).
Chapter 15. IDE Controller Registers
Chapter 15 provides a detailed description of all registers that reside in the IDE
controller. This controller resides at Device 31, Function 1 (D31:F1).
Chapter 16. AC ’97 Audio Controller Registers
Chapter 16 provides a detailed description of all registers that reside in the audio
controller. This controller resides at Device 30, Function 2 (D30:F2). Note that this
section of the datasheet does not include the native audio mixer registers. Accesses to
the mixer registers are forwarded over the AC-link to the codec where the registers
reside.
Chapter 17. AC ’97 Modem Controller Registers
Chapter 17 provides a detailed description of all registers that reside in the modem
controller. This controller resides at Device 30, Function 3 (D30:F3). Note that this
section of the datasheet does not include the modem mixer registers. Accesses to the
mixer registers are forwarded over the AC-link to the codec where the registers reside.
Chapter 18. Intel^® High Definition Audio Controller Registers
Chapter 18 provides a detailed description of all registers that reside in the Intel^® High
Definition Audio controller. This controller resides at Device 27, Function 0 (D27:F0).
Chapter 19. PCI Express* Port Controller Registers
Chapter 19 provides a detailed description of all registers that reside in the PCI Express
controller. This controller resides at Device 28, Functions 0 to 5 (D30:F0-F5).
Intel ^® ICH7 Family Datasheet
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