307013-003 Datasheet, PDF (697/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

PCI Express* Configuration Registers (Desktop and Mobile Only)
18.1.53 V0CTL — Virtual Channel 0 Resource Control Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 114h–117h
Default Value: 800000FFh
Attribute:
Size:
R/W, RO
32 bits
Bit
Description
31
Virtual Channel Enable (EN) — RO. Always set to 1. Virtual Channel 0 cannot be
disabled.
30:27 Reserved.
26:24
Virtual Channel Identifier (VCID) — RO. This field indicates the ID to use for this virtual
channel.
23:20 Reserved.
Port Arbitration Select (PAS) — R/W. This field indicates which port table is being
19:17 programmed. The root complex takes no action on this setting since the arbitration is
fixed and there is no arbitration table.
16
Load Port Arbitration Table (LAT) — RO. The root port does not implement an arbitration
table for this virtual channel.
15:8 Reserved.
Transaction Class / Virtual Channel Map (TVM) — R/W. This field indicates which
transaction classes are mapped to this virtual channel. When a bit is set, this
transaction class is mapped to the virtual channel.
Bit
Transaction Class
7
Transaction Class 7
6
Transaction Class 6
7:1
5
Transaction Class 5
4
Transaction Class 4
3
Transaction Class 3
2
Transaction Class 2
1
Transaction Class 1
0
Transaction Class 0
0 Reserved. Transaction class 0 must always be mapped to VC0.
18.1.54 V0STS — Virtual Channel 0 Resource Status Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 11Ah–11Bh
Default Value: 0000h
Attribute:
Size:
RO
16 bits
Bit
Description
15:2 Reserved.
VC Negotiation Pending (NP) — RO.
1 _{0 = Negotiation is not pending.}
1 = Virtual Channel is still being negotiated with ingress ports.
0
Port Arbitration Tables Status (ATS). There is no port arbitration table for this VC; this
bit is reserved as 0.
Intel ^® ICH7 Family Datasheet
697