307013-003 Datasheet, PDF (526/848 Pages) Intel Corporation – Intel I/O Controller Hub 7

SATA Controller Registers (D31:F2) (Desktop and Mobile Only)
12.3.1.2
GHC—Global ICH7 Control Register (D31:F2)
Address Offset: ABAR + 04h–07h
Default Value: 00000000h
Attribute:
Size:
R/W
32 bits
Bit
Description
31
30:2
1
0
AHCI Enable (AE) — R/W. When set, indicates that an AHCI driver is loaded and the
controller will be talked to via AHCI mechanisms. This can be used by an Intel^® ICH7
that supports both legacy mechanisms (such as SFF-8038i) and AHCI to know when the
controller will not be talked to as legacy.
When set, software will only talk to the ICH7 using AHCI. The ICH7 will not have to
allow command processing via both AHCI and legacy mechanisms. When cleared,
software will only talk to the ICH7 using legacy mechanisms.
Software shall set this bit to 1 before accessing other AHCI registers.
Reserved. Returns 0.
Interrupt Enable (IE) — R/W. This global bit enables interrupts from the ICH7.
0 = All interrupt sources from all ports are disabled.
1 = Interrupts are allowed from the AHCI controller.
HBA Reset (HR) — R/W. Resets ICH7 AHCI controller.
0 = No effect
1 = Causes an internal reset of the ICH7 AHCI controller. All state machines that relate
to data transfers and queuing return to an idle condition, and all ports are re-
initialized via COMRESET.
NOTE: For further details, consult section 12.3.3 of the Serial ATA Advanced Host
Controller Interface specification.
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Intel ^® ICH7 Family Datasheet